Pixel-based image sensors are often required to operate with extremely low signal levels, making them susceptible to electrical noise and thermal noise. Among the various types of noise sources, one particular limiting factor for an image sensor cell to achieve a lower noise detection floor is the random telegraph (RTS) noise of the source follower transistor. RTS noise affects the output of the image sensor circuit with small, random jitters, positive and negative, in the output signal. RTS noise is generally caused by trapping and detrapping of electrons or holes associated with defects at or near the gate oxide/channel interface in a transistor.
Unfortunately, the presence of the RTS noise and the resulting inaccuracies in reading pixel values of an image sensor may produce inaccurate or noisy images. One way of reducing RTS noise is to make use of buried channel transistors. Buried channel transistors are typically formed by counter-doping the channel region of a planar MOS (metal-oxide semiconductor) transistor. In buried channel transistors, the doping structure in the channel region provides a conducting channel at zero gate bias. The buried channel transistor is then turned off by depleting the channel region with an appropriate gate bias voltage. In the intended operation regime, some bias is applied so that the conducting portion of the channel remains separated from the gate oxide/channel interface. This significantly reduces the probability of the carriers being trapped by the defects at the oxide/channel interface. Accordingly, the buried channel transistor is expected to exhibit less RTS noise since carriers are less likely to be associated with trapping/detrapping events.
Unfortunately, conventional buried channel transistors are more sensitive to short channel effects which reduce their effectiveness as switches and limits scaling thereof. For example, buried channel transistors are more prone to two-dimensional (2D) effects, like the drain-induced barrier lowering, threshold voltage (Vt) roll-off with decreasing channel length, and punch-through. In some types of image sensor circuits, these disadvantages can outweigh any advantages associated with the lower RTS provided by the conventional buried channel transistor.